1. Field of the Invention
This invention relates to electrically rewritable nonvolatile semiconductor memory devices including, but not limited to, electrically erasable programmable read-only memories (EEPROMs).
2. Description of the Related Art
In recent years, flash EEPROM memories include advanced chips with multiple built-in operation modes, such as a page mode and a burst mode. The page mode and burst mode are for enabling achievement of high-speed read operations by reading data out of a memory cell array to a page buffer in units of pages—a page consists of a plurality of words of data—and then storing therein the read data, and for performing data transmission in a pathway spanning from a read circuit up to more than one external terminal by intra-page random access architectures (in the case of the page mode) or alternatively as a series of burst signals in a fixed, clock-controlled order (in the burst mode).
In an ordinary or standard random access-based word mode, data readout is done on a per-word bases for the part covering from the memory cell array through the read circuit up to the external terminal(s), wherein a word consists of a prespecified number of bits of binary data—for example, eight (8) or sixteen (16) or else. In this case, a time as taken to perform cell selection, date sensing and data output may be approximately 100 nanoseconds (ns). This read time period determines the length of an access cycle. In contract, in the case of the page mode, letting a page of data be read into a page buffer in advance makes it possible to perform high-speed random access operations thereafter by intra-page accessing within a shortened length of read time period, which measures about 25 ns.
To make a flash memory offer the operating capability in such page mode, an increased number of on-chip sense amplifiers should be employed. For example, if one page is 8 words (i.e. 128 bits) of data, then sense amps which correspond in number to 8 words are required. However, if the flash memory is specifically designed to have page-mode functionality only, then problems occur in cases where a system with such page mode-dedicated flash memory built therein does not support the page mode in any way. Supposing that the flash memory chip is operable in the page mode although the system fails to offer page-mode operability, a great number of sense amps must operate in vain. And, when all of the sense amps corresponding in number to 8 words (i.e. 1 page) operate together in spite of the fact that what is required is merely to operate a sense amp corresponding to one word, this results in significant waste of electrical power being consumed.
It is an object of this invention to provide a new and improved nonvolatile semiconductor memory device with a plurality of read modes switchably built therein.